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1 p4c168, p4c169, p4c170 ultra high speed 4k x 4 static cmos rams description the p4c168, p4c169 and p4c170 are a family of 16,384-bit ultra high-speed static rams organized as 4k x 4. all three devices have common input/output ports.the p4c168 enters the standby mode when the chip enable ( ce ) control goes high; with cmos input levels, power consumption is only 83mw in this mode. both the p4c169 and the p4c170 offer a fast chip select access time that is only 67% of the address access time. in addition, the p4c170 includes an output enable ( oe ) control to elimi- nate data bus contention. the rams operate from a single 5v 10% tolerance power supply. features full cmos, 6t cell high speed (equal access and cycle times) ? 12/15/20/25/35ns (commercial) ? 20/25/35/45/55/70ns (p4c168 military) low power operation (commercial) ? 715 mw active ? 193 mw standby (ttl input) p4c168 ? 83 mw standby (cmos input) p4c168 single 5v10% power supply fully ttl compatible, common i/o ports three options ? p4c168 low power standby mode ? p4c169 fast chip select control ? p4c170 fast chip select, output enable controls standard pinout (jedec approved) ? p4c168: 20-pin dip, soj, lcc, soic, cerpack, and flat pack ? p4c169: 20-pin dip and soic ? p4c170: 22-pin dip access times as fast as 12 nanoseconds are available, permitting greatly enhanced system operating speeds. cmos is used to reduce power consumption to a low 715 mw active, 193 mw standby. the p4c168 and p4c169 are available in 20-pin (p4c170 in 22-pin) 300 mil dip packages providing excellent board level densities. the p4c168 is also available in 20- pin 300 mil soic, soj, cerpack, and flat pack packages. the p4c169 is also available in a 20-pin 300 mil soic package. pin configurations functional block diagram p4c168 p4c169 dip (p2, c6, d2) dip (p2) soic (s2) soic (s2) soj (j2) cerpack (f2) solder seal flat pack (fs-2) p4c170 dip (p3)
p4c168, p4c169, p4c170 2 maximum ratings (1) symbol parameter value unit v cc power supply pin with ? 0.5 to +7 v respect to gnd terminal voltage with ? 0.5 to v term respect to gnd v cc +0.5 v (up to 7.0v) t a operating temperature ?55 to +125 c symbol parameter value unit t bias temperature under ? 55 to +125 c bias t stg storage temperature ? 65 to +150 c p t power dissipation 1.0 w i out dc output current 50 ma symbol parameter conditions typ. unit c in input capacitance v in = 0v 5 pf c out output capacitance v out = 0v 7 pf recommended operating conditions capacitances (4) (v cc = 5.0v, t a = 25c, f = 1.0mhz) grade (2) commercial military ambient temp 0c to 70c ?55c to +125c gnd 0v 0v v cc 5.0v 10% 5.0v 10% v ih v il v hc v lc v oh i li i sb i sb1 input high voltage input low voltage cmos input high voltage cmos input low voltage output low voltage (ttl load) output high voltage (cmos load) input leakage current output leakage current dynamic operating current standby power supply current (ttl input levels) p4c168 only standby power supply current (cmos input levels) p4c168 only input clamp diode voltage output low voltage (cmos load) output high voltage (ttl load) parameter symbol test conditions v cc = min., i in = ?18 ma v cc = max., v in = gnd to v cc v cc = max., cs = v ih , v out = gnd to v cc ce v ih , v cc = max., f = max., outputs open ce v hc , v cc = max., f = 0, outputs open v in v lc or v in v hc mil. comm?l mil. comm?l p4c168/169/170 min 2.2 ?0.5(3) v cc ?0.2 ?0.5(3) 2.4 ?10 ?5 ?10 ?5 max v cc +0.5 0.8 v cc +0.5 0.2 +10 +5 +10 +5 unit v v v v ?1.2 v v cd i ol = +8 ma, v cc = min. 0.4 v v ol i olc = +100 a, v cc = min. 0.2 v v olc i oh = ?4 ma, v cc = min. v i ohc = ?100 a, v cc = min. v cc ?0.2 v v ohc a i lo a i cc 35 ma 15 ma ___ ___ v cc = max., f = max., outputs open 130 ma ___ dc electrical characteristics
3 p4c168, p4c169, p4c170 ac characteristics?read cycle (v cc = 5v 10%, all temperature ranges) (2) p4c168 only ? p4c170 only ? chip select/deselect for p4c169 and p4c170 min max min max min max min max min max t rc read cycle time 12 15 20 25 35 ns t aa address access time 12 15 20 25 35 ns t ac chip enable access time 12 15 20 25 35 ns t ac ? chip select access time 8 9 12 15 20 ns t oh output hold from address change 22222 ns t lz ? chip enable to output in low z 22222 ns t hz ? chip disable to output in high z 7 8 9 10 15 ns t oe ? output enable to data valid 8 10 12 15 15 ns t olz ? output enable to output in low z 00000 ns t ohz ? output disable to output in high z 6 7 9 11 15 ns t rcs read command setup time 00000 ns t rch read command hold time 00000 ns t pu chip enable to power up time 00000 ns t pd chip disable to power down time 12 15 20 25 35 ns sym parameter unit -35 -12 -15 -20 -25 ac characteristics?read cycle (continued) (v cc = 5v 10%, all temperature ranges) (2) min max min max min max t rc read cycle time 45 55 70 ns t aa address access time 45 55 70 ns t ac chip enable access time 45 55 70 ns t oh output hold from address change 2 2 2 ns t lz ? chip enable to output in low z 2 2 2 ns t hz ? chip disable to output in high z 25 25 30 ns t rcs read command setup time 0 0 0 ns t rch read command hold time 0 0 0 ns t pu chip enable to power up time 0 0 0 ns t pd chip disable to power down time 45 55 70 ns sym parameter unit -45 -55 -70
p4c168, p4c169, p4c170 4 notes: 7. address must be valid prior to, or coincident with ce / cs transition low. for fast cs , t aa must still be met. 8. transition is measured 200mv from steady state voltage prior to change, with loading as specified in figure 1. 9. read cycle time is measured from the last valid address to the first transitioning address. timing waveform of read cycle no. 2 ( ce ce ce ce ce / cs cs cs cs cs controlled) (5,7) timing waveform of read cycle no. 3?p4c170 only ( oe oe oe oe oe controlled) (5) timing waveform of read cycle no. 1 (address controlled) (5,6) notes: 5. we is high for read cycle. 6. ce / cs and oe are low for read cycle.
5 p4c168, p4c169, p4c170 ac electrical characteristics - write cycle (v cc = 5v 10%, all temperature ranges) (2) min max min max min max min max min max t wc write cycle time 12 15 18 20 30 ns t cw chip enable time to end of write 1215182030 ns t aw address valid to end of write 1215182030 ns t as address set-up time 00000 ns t wp write pulse width 1215182030 ns t ah address hold time 00000 ns t dw data valid to end of write 7 8 10 10 15 ns t dh data hold time 00000 ns t wz write enable to output in high z 456713ns t ow output active from end of write 00000 ns sym parameter unit -35 -12 -15 -20 -25 ac electrical characteristics - write cycle (continued) (v cc = 5v 10%, all temperature ranges) (2) min max min max min max t wc write cycle time 45 55 70 ns t cw chip enable time to end of write 40 50 60 ns t aw address valid to end of write 40 50 60 ns t as address set-up time 0 0 0 ns t wp write pulse width 40 50 60 ns t ah address hold time 0 0 0 ns t dw data valid to end of write 20 20 25 ns t dh data hold time 3 3 3 ns t wz write enable to output in high z 20 25 30 ns t ow output active from end of write 0 0 0 ns sym parameter unit -45 -55 -70
p4c168, p4c169, p4c170 6 mode ce ce ce ce ce ( cs cs cs cs cs ) we we we we we output standby (deselect) h x high z read l h d out write l l high z timing waveform of write cycle no. 2 ( ce ce ce ce ce / cs cs cs cs cs controlled) (10) truth tables p4c168 (p4c169) p4c170 mode ce ce ce ce ce we we we we we oe oe oe oe oe output deselect h x x high z read l h l d out output inhibit l h h high z write l l x high z notes: 10. ce / cs and we must be low for write cycle. 11. if ce / cs goes high simultaneously with we high, the output remains in a high impedance state. 12. write cycle time is measured from the last valid address to the first transitioning address. timing waveform of write cycle no. 1 ( we we we we we controlled) (10)
7 p4c168, p4c169, p4c170 * including scope and test fixture. note: because of the ultra-high speed of the p4c168, p4c169 and p4c170 care must be taken when testing these devices; an inadequate setup can cause a normal functioning part to be rejected as faulty. long high- inductance leads that cause supply bounce must be avoided by bringing the v cc and ground planes directly up to the contactor fingers. a high frequency capacitor of 0.01 f is also required between v cc and ground. figure 1. output load figure 2. thevenin equivalent input pulse levels gnd to 3.0v input rise and fall times 3ns input timing reference level 1.5v output timing reference level 1.5v output load see figures 1 and 2 ac test conditions to avoid signal reflections, proper termination must be used; for example, a 50 test environment should be terminated into a 50 load with 1.73v (thevenin voltage) at the comparator input, and a 116 resistor must be used in series with d out to match 166 (thevenin resistance). lcc pin configuration lcc (l9)
p4c168, p4c169, p4c170 8 ordering information selection guide the p4c168, p4c169 and p4c170 are available in the following temperature, speed and package options. ? p4c168 and p4c169 only. ?? p4c168 * military temperature range with mil-std-883, class b processing. n/a = not available 12 15 20 25 35 plastic dip -12pc -15pc -20pc -25pc n/a plastic soic? -12sc -15sc -20sc -25sc n/a plastic soj?? -12jc -15jc -20jc -25jc n/a lcc n/a -15lm -20lm -25lm -35lm cerdip n/a -15dm -20dm -25dm -35dm side brazed dip n/a -15cm -20cm -25cm -35cm cerpack n/a -15fm -20fm -25fm -35fm solder seal flat pack n/a -15fsm -20fsm -25fsm -35fsm lcc n/a -15lmb -20lmb -25lmb -35lmb cerdip n/a -15dmb -20dmb -25dmb -35dmb side brazed dip n/a -15cmb -20cmb -25cmb -35cmb cerpack n/a -15fmb -20fmb -25fmb -35fmb solder seal flat pack n/a -15fsmb -20fsmb -25fsmb -35fsmb military processed* (p4c168 only) speed temperature range package commercial temperature military temperature (p4c168 only)
9 p4c168, p4c169, p4c170 selection guide (continued) * military temperature range with mil-std-883, class b processing. 45 55 70 lcc -45lm -55lm -70lm cerdip -45dm -55dm -70dm side brazed dip -45cm -55cm -70cm cerpack -45fm -55fm -70fm solder seal flat pack -45fsm -55fsm -70fsm lcc -45lmb -55lmb -70lmb cerdip -45dmb -55dmb -70dmb side brazed dip -45cmb -55cmb -70cmb cerpack -45fmb -55fmb -70fmb solder seal flat pack -55fsmb -55fsmb -70fsmb military processed* (p4c168 only) speed temperature range package military temperature (p4c168 only)
p4c168, p4c169, p4c170 10 cerpack ceramic flat package pkg # # pins symbol min max a 0.060 0.090 b 0.015 0.022 c 0.004 0.009 d-0.530 e 0.305 0.355 e k 0.005 0.018 l 0.250 0.370 q 0.026 0.045 s-0.085 s1 0.005 - f2 20 0.050 bsc side brazed dual in-line package pkg # # pins symbol min max a-0.200 b 0.014 0.026 b2 0.045 0.065 c 0.008 0.018 d-1.060 e 0.220 0.310 ea e l 0.125 0.200 q 0.015 0.070 s1 0.005 - s2 0.005 - c6 20 (300 mil) 0.300 bsc 0.100 bsc
11 p4c168, p4c169, p4c170 pkg # # pins symbol min max a 0.120 0.140 a1 0.080 - b 0.014 0.020 c 0.008 0.013 d 0.496 0.512 e e 0.335 0.347 e1 0.292 0.300 e2 q0.025- j2 20 (300 mil) 0.050 bsc 0.267 bsc soj small outline ic package solder seal flat package pkg # # pins symbol min max a 0.045 0.115 b 0.015 0.022 b1 0.015 0.019 c 0.004 0.009 c1 0.004 0.006 d - 0.540 e 0.245 0.300 e1 - 0.330 e2 0.130 - e3 0.030 - e k 0.008 0.015 l 0.250 0.370 q 0.026 0.045 s1 0.000 - m - 0.0015 n fs-2 20 0.050 bsc 20
p4c168, p4c169, p4c170 12 pkg # # pins symbol min max a 0.060 0.075 a1 0.050 0.066 b1 0.022 0.028 d 0.280 0.305 d1 d2 d3 - 0.305 e 0.420 0.440 e1 e2 e3 - 0.440 e h j l 0.045 0.055 l1 0.045 0.055 l2 0.075 0.098 nd ne l9 20 0.150 bsc 0.075 bsc 0.010 ref 4 6 0.250 bsc 0.125 bsc 0.050 bsc 0.020 ref rectangular leadless chip carrier pkg # # pins symbol min max a-0.210 a1 0.015 - b 0.014 0.022 b2 0.045 0.070 c 0.008 0.014 d 0.980 1.060 e1 0.240 0.280 e 0.300 0.325 e eb - 0.430 l 0.115 0.150 0 15 0.100 bsc p2 20 (300 mil) plastic dual in-line package (p4c168, p4c169)
13 p4c168, p4c169, p4c170 pkg # # pins symbol min max a 0.093 0.104 a1 0.004 0.012 b2 0.013 0.020 c 0.009 0.012 d 0.496 0.511 e e 0.291 0.299 h 0.394 0.419 h 0.010 0.029 l 0.016 0.050 0 8 s2 20 (300 mil) 0.050 bsc soic/sop small outline ic package pkg # # pins symbol min max a - 0.210 a1 0.015 - b 0.014 0.022 b2 0.045 0.070 c 0.008 0.014 d 1.145 1.165 e1 0.240 0.280 e 0.300 0.325 e eb - 0.430 l 0.115 0.150 0 15 0.100 bsc p3 22 (300 mil) plastic dual in-line package (p4c170)
p4c168, p4c169, p4c170 14 cerdip dual in-line package pkg # # pins symbol min max a-0.200 b 0.014 0.026 b2 0.045 0.065 c 0.008 0.018 d-1.060 e 0.220 0.310 ea e l 0.125 0.200 q 0.015 0.070 s1 0.005 - 0 15 0.100 bsc d2 20 (300 mil) 0.300 bsc

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